Hackaday

A RISC-V That The Rest Of Us Can Understand

There is great excitement in the world of microprocessors, surrounding the RISC-V architecture. This is an open source modular instruction set specification that has seen implementations on FPGAs, and ...
Nasdaq

Renesas Selects Andes RISC-V 32-Bit CPU Cores for its First RISC-V Implementation of ASSPs

TOKYO--(BUSINESS WIRE)-- Renesas Electronics Corporation (TSE:6723), a premier supplier of advanced semiconductor solutions, today announced a technology IP cooperation with Andes Technology, an ...
Semiconductor Engineering

Does Your RISC-V Core Meet The Standard?

Architectural conformance and implementation verification are necessary but different for RISC-V designs, yet few verification engineers have experience on the conformance side. While RISC-V enables ...
Electronics Weekly

Digi-Key to host RVfpga Webinar on RISC-V architecture and implementation

Digi-Key has announced it will host a RVfpga webinar, in collaboration with Imagination Technologies, on the topic of understanding RISC-V architecture and implementation on an FPGA. Running on ...
Business Wire

RISC-V SoftCPU Contest Winners Demonstrate Cutting-Edge RISC-V Implementations for FPGAs

BERKELEY, Calif. & SANTA CLARA, Calif.--(BUSINESS WIRE)--Today at the RISC-V Summit, the RISC-V Foundation, a non-profit corporation controlled by its members to drive the adoption and implementation ...
Design-Reuse

UltraSoC donates RISC-V trace implementation to enable true open-source development

December 6, 2019-- UltraSoC today announced it will offer an open-source implementation of its industry-leading RISC-V trace encoder via the OpenHW Group. The availability of a production-grade, ...
Electronic Design

The Rise of RISC-V on Display at Workshop

Who is using RISC-V? Judging from this year’s RISC-V Workshop, it appears many more firms have decided to enter the fray—with more to come. Nvidia gave a presentation about how its proprietary Falcon ...