PCIe technology is set to be leveraged as an important component in the AI infrastructure marketplace. According to the “PCI ...

Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data centers, AI, and networking applications. The PHY’s flexible ...

Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data centers, AI, and networking applications. The PHY’s flexible ...

This collaboration highlights GUC's commitment to deliver comprehensive and innovative design solutions, enabling customers ...

This funding will support the continued development and demonstration of Strategic Radiation Hardened (SRH) high reliability ...

The partnership between Silvaco and Micon Global is expected to drive Silvaco’s expansion across the EMEA market, leveraging Micon Global’s expertise to enhance client access to Silvaco’s design ...

The 10/100/1G Ethernet Verification IP is compliant with IEEE 802.3 specifications and verifies MAC-to-PHY layer interfaces of designs with a 10/100/1000M Ethernet ...

Rambus PCIe 4.0 Controller is a configurable and scalable PCIe controller Soft IP designed for ASIC and FPGA implementation. The Rambus PCIe 4.0 Controller is compliant with the PCI Express ... Rambus ...

Synopsys MIPI® IP solution enables low-power and high-performance interface between system-on-chips (SoCs), application processors, baseband processors, and peripheral devices. Synopsys’ broad MIPI IP ...

The MXL-D-PHY-UNIV-T-22ULP is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification for D-PHY v2.5. The PHY can be configured as a MIPI ...

MIPI RFFE SPI I2C Slave interface provides full support for the two-wire MIPI RFFE synchronous serial interface with SPI and I2C overlay, compatible with RFFE, SPI and I2C specification. Through its ...

The CCP2 transmitter consists of a 32:1 serializer followed by LVDS drivers for transmitting clock (or strobe) and data. The LVDS drivers operate in subLVDS mode only, which is defined in the ...