Semiconductor Engineering

Blog Review: Nov. 26

CXL L0p demystified; DRC then and now; LLVM updates; where 6G and AI converge; just-in-time supply chains break down.
Semiconductor Engineering

Research Bits: Nov. 26

Hydrogel NAND gate; long-distance remote epitaxy; PAM-8 receiver.
Semiconductor Engineering

Simplifying ESD Protection and Inter-Chiplet Signaling In Future 2.5D/3D Packaging Technologies (Arizona State, Univ. of Minnesota)

A new technical paper titled “Tiny Chiplets Enabled by Packaging Scaling: Opportunities in ESD Protection and Signal ...
Semiconductor Engineering

Roadmap for Open-Source Chiplet-Based RISC-V Systems For HPC and AI (ETH Zurich, Univ. of Bologna)

A new technical paper titled “Toward Open-Source Chiplets for HPC and AI: Occamy and Beyond” was published by researchers at ...
Semiconductor Engineering

DSA Method Of 3D Interconnected Structures In Thin Films (MIT)

A new technical paper titled “Directed self-assembly of 3D interconnected networks” was published by researchers at MIT. Abstract: “Directed self-assembly (DSA) of block copolymers (BCPs) has long ...
Semiconductor Engineering

Digital Memristor-Based PIM From A Device And Reliability View (Northwestern, Technion)

A new technical paper titled “A Comparative Study of Digital Memristor-Based Processing-In-Memory from a Device and Reliability Perspective” was published by researchers at Northwestern University and ...